Packet-switched networks are responsible for forwarding packet-based traffic. In some hardware devices, such as switches and routers, packets are broken into fixed-length cells and forwarded from an ingress module, across a switching fabric, to an egress module, where the cells are typically reassembled into packets. While awaiting transmission from the ingress module to the fabric, from the fabric to the egress module, reassembly in the egress module, etc., a packet, broken into cells, may be temporarily stored/buffered in memory. Additionally, the packet, broken into cells, may be represented by a list of pointers that correspond to the one or more memory locations occupied by the one or more cells of that packet.
However, while the cells of packets are being read from or written to memory it is possible for memory resource conflicts or memory resource oversubscription to occur. A way to improve performance is to minimize memory resource conflicts and oversubscription. For example, some memories, such as DRAM incur a time penalty for accesses to the same interface and bank that are not on the same row. Minimizing resource conflicts and time penalties is an on-going optimization problem.
In view of the desire to minimize resource conflicts and time penalties, what is needed is a pointer allocation scheme that reduces conflicts. It would be further desirable to distribute memory reads and memory writes across packet memory interfaces and packet memory banks so that no interface or bank goes under- or over-utilized.